Various memory ordering schemes may be implemented in a computing system to address when a processor in a multiprocessor system “sees” memory operations by other processors. Memory ordering may also be referred to as memory consistency or event ordering. Memory operations, such as a load operation or store operation, may be seen at different times by different processors. This may lead to software not executing as expected or operating differently on a multiprocessor system compared to a uniprocessor system.
To address memory consistency, some memory consistency models have been developed. The different models have tradeoffs in terms of system performance.
Thus, there is a continuing need for alternate ways to implement memory consistency in a system.
It will be appreciated that for simplicity and clarity of illustration, elements illustrated in the figures have not necessarily been drawn to scale. For example, the dimensions of some of the elements are exaggerated relative to other elements for clarity. Further, where considered appropriate, reference numerals have been repeated among the figures to indicate corresponding or analogous elements.